Radio frequency receivers are well known and have automatic gain control (AGC) circuits that attempt to provide control of one or more gain stages based on the detected input power levels to maintain a relatively constant power level. Accordingly, a large dynamic range of incoming signals is modified, such as attenuated or amplified, to provide a more constant level of signal for processing. Typically, there are two stages of an AGC circuit, an analog stage such as multigain stages, and a digital stage. The digital stage may have an analog/digital converter and other digital circuitry to suitably control the analog gain stages. These two stage AGC circuits have been developed in an attempt to control a gain for time division multiple access (TDMA) signals and some code division multiple access (CDMA) systems.
However, known AGC circuits typically may be too slow to accurately compute and control millions of chips per second of data, such as for CDMA systems. For example, known CDMA type receivers, may have a limited dynamic range that is too small and can be too slow to track input signals that can change quickly. Generally, with CDMA signals, low pass filter time constants of AGC input stages can be too slow to respond in order to suitably capture a low power, fast changing coded signal. In addition, with CDMA receivers, typically a wide band receiver is used that has a bandwidth of one to five MHz. However, such systems typically need to accommodate for fast fading signals over larger frequency ranges since mobile units may be quickly changing power levels depending upon their closeness to a transmitting or receiving station. As known, CDMA systems allow mobile stations to use the same radio frequencies and differing codes. Accordingly, the receivers need to quickly detect varying power levels at the same frequency for different received codes. Also, known AGC circuits control an in-phase and quadrature phase gain substantially independently which can result in code domain degradation. As known, CDMA systems utilize in-phase and quadrature-phase demodulation sub-systems. Imbalances in the gain of these sub-systems create errors in the demodulation process. The ratio of the quadrature signal amplitude to the in-phase amplitude is used to measure the relative phase of the incoming signal; the square root of the total sum of the quadrature power and the in-phase power is used as an amplitude measurement. Any error in the demodulation process degrades the incoming signal measurement quality and this degradation is known as code domain degradation.
In addition, DC offsets introduced, for example, by changes in temperature of the system and leakage of local oscillators, and other known factors, may cause a received signal to exceed the limit of an A/D's high end due to uncorrected DC offset. In addition, when the input signal exceeds the linear range of a receiver, the receiver automatically clips the signal, for example, if a DC offset is received as part of the signal, or truncates a low signal.
Accordingly, a need exists to increase the dynamic range of a radiotelephone receiver using AGC circuits and methods. Such AGC circuits and methods should attempt to have increased speed compared to dual stage receivers to accommodate CDMA input signals and other input signals that have rapidly changing power levels. In addition, DC offset correction should be employed to assist in more accurately controlling gain compensation for received signals.